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Du Huimin, Zeng Zecang, Men Lilin, Han JunGang, Shen Xubang. Building Verification Platform For SDH ChipsJ. Journal of Computer-Aided Design & Computer Graphics, 2004, 16(5): 678-681.
Citation: Du Huimin, Zeng Zecang, Men Lilin, Han JunGang, Shen Xubang. Building Verification Platform For SDH ChipsJ. Journal of Computer-Aided Design & Computer Graphics, 2004, 16(5): 678-681.
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Building Verification Platform For SDH Chips

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  • Methodology and architecture of SDH-oriented verification platform with flexible configuration for different SDH chip designs are presented to quickly and easily create random scenarios. The platform has been applied to an over two-million gates SDH chip design and experimental results show that the platform greatly improved our verification efficiency.
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