Research and Realization on Test Vector Translation Model Based on STIL

This paper presents a general test vector translation model based on the two-step translation method. The model includes two major parts, the first part is the improved translation flow, and the second part is the data format supporting the per-pin-ATE resource, which is described in STIL. Based on this translation model, we developed the test vector translation system SpeedyE2A(S) for three self-developed ATEs. Experimental results show that SpeedyE2A(S) can significantly reduce the translation time compared with TDS when translating large test vectors. The translated vectors by SpeedyE2A(S) are successfully applied to test 8051 microcontroller and Haier HDTV integrated circuits on the ATE of Beijing Automated Test Technology Institute.