Effective Measures to Reduce Hardware Overhead on Multiseeding BIST

This paper presents a novel build-in self-test (BIST) approach by reseeding an LFSR. It adopts test patterns used to detect random pattern resistant faults as its seeds. Don't care bits in those seeds, which are remained during the process of test pattern generation by an automatic test pattern generator (ATPG) tool, are utilized to reduce the size of storage of a seed array. Experimental results show that the proposed approach is able to achieve higher fault coverage, which is approximately equal to the one of an ATPG on which the approach depends, and needs less additional hardware overhead for synthesis, and consumes less time for test pattern application. After a brief review of those typical deterministic BIST schemes, this paper mainly introduces its scheme of storage compression, synthesis methodology, and experimental results.