A NEW METHOD OF SEQUENTIAL LOGIC SYNIHESIS BASED ON COMBINATIONAL LOGIC MINIMIZATION

This paper introduces a new method which is different from classical sequential logic synthesis. This method, based on combinational logic minimization, proposes a new idea to proceed state assignment according to constrained.relation of compressed state table. After a series of transformations, it can implement the transformation from the primitive state table to sequential logic circuits which uses PLA as a combinational logic unit. Because this new method must solve a large scale covering table, this paper proposes a simplified algorithm This paper also proposes some practical examples to show the calculation processes of the simplified algorithm. The results demostrate that this simplified algorithm can drive the simpler sequential logic expression which is implemented from the primitive state table.