Behavioral Verification Model for Real Time Embedded System

There are several means to verify target system function in hardware/software co-design field. Instruction set simulator (ISS) is widely used due to its ability to accurately simulate target CPU at low level. As virtual CPU is running in host machine, ISS simulates target instruction set at bus cycle or instruction cycle, so it is usually very time consuming. A fast behavioral verification model with real time operating system (RTOS) approach is presented, and the mechanism of verification is described in full detail to illustrate how the model works correctly. The RTOS simulator divides embedded software into three parts, namely the embedded software function code, RTOS hardware interface code and customized ASIC driver code. The customized ASIC driver is responsible to deal with all kinds of request/replay between hardware and software, so that RTOS simulator can communicate with VHDL or Verilog HDL Simulator and realize fast verification.