An Improved Method for Selecting Partial Scan Flip-Flops

An improvement from an existing method based on state density of the sequential loops is presented. It is a comprehensive approach based on fault controllability and observability. The possible timing loss in the partial scan design is also considered. Simulation results on ISCAS89 benchmark circuits show its good performance. It can reduce the number of selected flip-flops and improve the test effectiveness and fault coverage.