Automatic Synthesis of Cell-level CMOS Analog Circuits in FDAADS

A optimization-based approach for automatic synthesis of cell-level CMOS analog circuits is presented.In order to shorten run time and promote design accuracy,a novel estimation technique is used to estimate circuit performance.Besides,simulated annealing algorithm and some other measures are taken to assure global optimum results.Synthesis tools for several celllevel CMOS analog circuits implemented with the above approach have been integrated in FDAADS-FuDan Analog Circuit Automated Design System.It has been demonstrated that this approach can give accurate design results with a reasonably short run time.