A Physical-Annotation-Based Power Modeling and Estimation Method for Processor

The proposed method is focused on synthesis-based static circuits,and a power modeling library is developed for modeling processors by means of parametric RTL and physical annotation,and all kinds of processor modules are mapped into combinations of basic components.Those models are linked to an architectural simulator,running benchmarks to get power results. The power analysis of benchmark platforms proves to be effective and highly correlated,with an average 10% error and little speed penalty compared with the gate-level power analysis.