Abstract:
Since object oriented programming language C++ is closed nearly with VHDL,through the translation of a VHDL description by using C++ with its optimizing ability,a VHDL translation simulator with higher efficiency of running time and occupied memory space can be implemented.A prototype design of a translation simulator V2C++ is implemented.The preliminary practice shows that the VHDL translation simulator implemented with C++ has higher efficiency and that it is useful for simulation of a large scale circuit.