多芯片组件互连的功耗分析
Analysis of Interconnect Power Consumption for Multi-Chip Module
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摘要: 使用RLC传输线模型对多芯片组件的互连进行表征,通过对输入互连的电流及其等效电阻的近似,推导得出多芯片组件互连功耗的频域数学表达式,并给出了计算机仿真实验结果.最后验证了文中方法的有效性.Abstract: This paper uses a RLC transmission line model to represent the multi-chip module interconnect, and figures out the interconnect power consumption equation in frequency domain. Finally, computer simulation results are presented to verify the theoretical analysis.
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