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嵌入式系统软硬件协同设计中的快速样机平台

Design of Rapid Prototyping Platform for Hardware/Software Co-design of Embedded System

  • 摘要: 提出一种嵌入式系统软硬件协同设计的快速样机平台设计方案,该方案使用系统级可编程芯片和处理机软核技术来构成快速样机平台所需的FPGA阵列和规模可调的处理机,以此实现软硬件的更紧密灵活的耦合和更小的通信延迟.可重构逻辑的应用使得该快速样机平台具有简单规整的结构,一方面使得快速样机平台之间的扩展连接更为容易,另一方面使得FPGA芯片中的逻辑资源能得到更充分利用.

     

    Abstract: The use of modern system on chip (SoC) technology and soft processor core permits a tight and flexible coupling between hardware and software with a minimal communication delay. By adding reconfigurable logic to its design, the platform has a simple and regular architecture, which simplifies the expansion connection between platforms, and allows users to make full use of the logic resources in FPGA chips.

     

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