Abstract: Synthesis of latch and flip-flop is one of the main problems which should be solved in sequential logic synthesis system．Different components can be inferred from different RTL circuit descriptions．This article discusses the synthesis of latches and flip-flops described in RTL form with VHDL language，clarifies the different cases of using latches and flip-flops in detail，and shows how to distinguish latches from flip-flops correctly．Experiment result at the end of this article verifies the effectiveness of presented approach．