Abstract: The automatic sizing of Power/Ground (P/G) nets is one of the most critical stage in VLSI physical design.In this paper，we first give some new properties about the optimum P/ G nets having general graph topology，and based on which we present an effective algorithm to find the optimum wire-width of P/G nets.Our algorithm is fast by successfully avoiding the redundant search and the time-consuming net analysis.Experimental results show that our algorithm is nearly 50％ faster than other available algorithms，and it is universally applicable for both the tree and the general graph topology.