Abstract: This paper summarizes some new developments in the area of test pattern generation during the past years. Extensive work has been done on test pattern generation. An evident trend is to adopt methods for test pattern generation applicable to large circuits with about 5000 gates for engineering applications. Based on the well-known algorithms, such as D-ALG, PODEM, FAN, some improvements and extensions have been made to meet the requirement. On the other hand, however, some new approaches are proposed to introduce new ideas to deal with large circuits. Therefore, it appears that the research on test generation has become active again after a short period of time This paper attemps to reveal some new developments of test pattern generation.