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时延差驱动的门级功耗估算算法

Efficient Average Power Estimation Algorithm Based on ROBDD and Delay Difference

  • 摘要: 提出一种基于ROBDD图和时延差的组合电路门级平均功耗估算算法,该算法适用于单位延迟模型和一般的延迟模型.算法用时匀质Markov链模型描述信号的变化,电路中各节点的开关活动率用功能翻转与毛刺翻转之和来衡量;根据信号之间的再汇聚特性生成超门,构造局部的ROBDD图(最简有序二叉决策图)来估算功能翻转;根据信号到达单元门各输入端之间的延迟差,构造毛刺产生模型,估算毛刺翻转.该算法通过构造节点的有约束超门缩小了ROBDD的规模;在考虑信号再汇聚而导致的信号相关性的同时,还比较精确地考虑由于时延差而产生的毛刺功耗.实验结果显示,与Monte-Carlo统计模拟方法相比,算法的估算精度在10%以内,运行速度要快一个数量级.

     

    Abstract: We propose a gate level algorithm for average power estimation in combinational circuit under the unit delay model and the general delay model.The well-known lag-one Markov Chain Model is used to describe the signal transition.Function transition and glitch transition associated with the switching activity of a node in the circuit, are separately calculated by two newly developed calculation models.By constructing the ROBDD only once according to the node logic function,the function transition can be calculated.This model considers the temporal and spatial correlations among signals.Glitch transition can be calculated by the delay difference of all the inputs on a gate and this gate's glitch-generating patterns appearing at the inputs.Experimental result indicates that our algorithm's accuracy is within 10% and the run-time is shorter by an order in comparison with the Monte-Carlo statistical algorithm.

     

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