Abstract: This paper introduces a method of using domaia to generate circuit logic diagrams automatically. With this method, circuit logic relationships are obtained from MOS IC, and then according to these relationships circuit logic diagrams are automatically generated by computers, for logic testing and verify ing. This method uses queueing technology, optimization of placement technology, etc. to enable the circuit logic diagrams to meet the general requirements, saving the area, This method can also support the topdown design process.