Abstract: High-level synthesis is an active area of research recently.The first step in high-level synthesis is to transform the behavior description of a digital system into an internal representation,then the other tasks will be carried out on this basis.In this paper,a new representation model of design for high-level synthesis based on petri net is developed.It can represent the maximum parallelism of the given design as well as the design on different stage for high-level synthesis,so this model can be used in the whole process.This representation model can be generated automatically and is easy for understanding.It is very fitable to represent high parallel(or concurrent) designs and the designs in which the data path and control are coupled very tightly.